DS1678S/T&R【PDF 9/25 页】IC RECORDER REALTIME EVENT 8SOIC

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DS1678 Real-Time Event Recorder

17 of 25

SPECIAL-PURPOSE REGISTERS

The following descriptions define the operation of the DS1678 special-purpose registers.

CONTROL REGISTER (0Eh)

MSB

LSB

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

CLR

DIS1

DIS0

TR1

TR0

EOSC

Bit 7: Mission Enable (ME). This bit enables the device to begin a mission. The ME bit cannot be

written to one unless the MEM CLR bit in the Status Register is one, signifying that the memory and

registers have been cleared. With the ME bit set to one, the device waits for the first event to occur (

INT

is activated). Once that first event occurs, the MIP bit is set, the time/date stamp is recorded in the Start

Time Stamp Register, the Event 0 Rollover Stamp is written to zero, the Event Counter Register is

incremented, and the ETC begins incrementing.

When the ME bit is set to logic zero, the DS1678 waits until a one is written to the MIP bit via the I2C

interface to start the mission. When the MIP bit is written to one, the ME bit is set to one, the current

time/date is recorded in the Start Time Stamp register, the Event 0 Rollover Stamp is written to zero, the

Event Counter Register is incremented, and the ETC begins incrementing.

The ME bit is automatically written to zero whenever a mission is stopped.

Bit 6: Clear Enable (CLR). This bit enables the memory to be cleared. When this bit is set to logic one

and the clear memory (CM) bit is subsequently set to one, the Event-Log Memory, Event Counter, and

Start Time Stamp registers are all cleared to zeros. Following the writing of a one to the ME bit, the CLR

bit is also set to logic zero, and the MEM CLR bit is set to logic one. If the clear enable bit is set, but a

command other than writing a one to the clear memory bit is issued next, the CLR bit is cleared to zero

and the contents of the Event-Log, Start Time Stamp, and Event Counter registers are unchanged.

Bits 5 and 4: Duration Interval Select 1 and 0 (DIS1 and DIS0). These bits select the amount of time

between increments of the ETC that is used to determine the amount of time between events. After the

first event is recorded, all subsequent events are recorded as the elapsed time since the previous event.

When a subsequent event occurs, the ETC value is stored in the event-log memory.

To obtain the maximum accuracy of the event logger, the smallest possible resolution of the ETC should

be selected. The expected maximum time between events must also be taken into account to get the full

1025 events logged, because when the ETC count reaches 65,535 increments, if the next event has not

occurred by that point, FFFFh is written into the memory, the ETC rolls over to 0000h and continues to

count until the next event occurs or FFFFh is reached again. Whenever FFFFh is reached by the ETC, it

stores that value in event-log memory, resets to 0000h, continues counting, and the memory address

pointer increments to the next memory location. Whenever an FFFFh appears in the memory, the next

two bytes of data are part of the elapsed time for the same event, even if the value in the next two bytes of

memory are 0000h, which means that an event occurred at time increment FFFFh. To recover the total

elapsed time between events when FFFFh is in the event-log memory; add the contents of the next two

bytes to the FFFFh. If the next two bytes are 0000h, indicating that the event occurred at FFFFh, add the

0000h to FFFFh to get FFFFh. If the next two bytes are 0100h, add 0100h to FFFFh to get 100FFh. This

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